SN74SSQE32882 buffer equivalent, 28-bit to 56-bit registered buffer.
1
*2 JEDEC SSTE32882 Compliant
* 1-to-2 Register Outputs and 1-to-4 Clock Pair
Outputs Support Stacked DDR3 DIMMs
* Chip Select Inputs Prevent Data Outputs fr.
* DDR3 Registered DIMMs up to DDR3-1333
* Single-, Dual- and Quad-Rank RDIMM
DESCRIPTION/ORDERING INFORMATION
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